Datacom Systems D56 Especificações Página 100
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Si5040
100 Rev. 1.3
14. Pin Descriptions: Si5040
Figure 24. Si5040 Pin Configuration (Transparent Top View)
Table 13. Si5040 Pin Descriptions
Pin Name Type* Level Description
16 INTERRUPT
DO LVTTL
or Open Drain
Interrupt (Active Low).
The interrupt output pin is provided to indicate potential fault
conditions or changes in status. Interrupt sources are mask-
able by setting the Interrupt Mask register, and interrupt status
is available from the Interrupt Status register. The interrupt
function can be disabled in the Interrupt Enable bit. The inter-
rupt pin can be configured via the Interrupt Output register as
either an open drain output (default) or LVTTL output.
19,18 RD+
RD–
AO Differential CML Receiver Data Output.
High-speed XFI-compliant receiver data output recovered
from the RXDIN input.
13,14 REFCLK+
REFCLK–
AI PECL Reference Clock Input.
A reference clock at this input is applied to the transmit CMU
and to the receiver and transmitter CDRs. The use of a refer-
ence clock is optional.
If the jitter performance of the external reference clock is
acceptable, the Si5040 can be operated in CMU mode. In this
mode, the CMU derives the line-rate clock by multiplying the
clock frequency applied to the REFCLK inputs. If the REFCLK
input is synchronous, the CMU multiplies the frequency by 64.
The resulting line-rate is frequency-locked to the serial data. A
FIFO in the data path accommodates any jitter differences
between the serial data and the CMU line-rate clock.
7, 6 RXDIN+
RXDIN–
AI Differential CML Receiver Data Input.
Data signal RD is recovered from the high-speed differential
signal present on these pins.
Data over the 9.8304 Gbps to 11.3 Gbps range is recovered.
*Note: TYPE: P = Power; AI = Analog Input; AO = Analog Output; DI = Digital Input; DO = Digital Output; DIO = Digital
Input/Output.
GND
PAD
1
2
3
2526272829303132
VDDIO
GND
GND
RXDIN+
RXDIN–
V
DD
GND
TXDOUT+
TXDOUT–
GND
V
DD
SD
RD+
GND
GND
TD–
GND
SCK
17
18
19
20
21
22
23
24
9 10 11 12 13 14 15 16
4
5
6
7
8
SS
TD+
RD–
GND
V
DD
REFCLK+
SPSEL
NC
NC
REFCLK-
V
DD
INTERRUPT
RX_LOL
RX_LOS
GND
PAD
GND
PAD
GND
PAD
- Features 1
- Applications 1
- Description 1
- Functional Block Diagram 1
- 2 Rev. 1.3 2
- TABLE OF CONTENTS 3
- Measurement 4
- 2. Electrical Specifications 5
- Table 2. DC Characteristics 6
- 8 Rev. 1.3 8
- = 1.8 V +5/–10%, T 8
- = –40 to 95 C) 8
- 10 Rev. 1.3 10
- Table 7. CMU Timing Modes 12
- Rev. 1.3 13 13
- Table 8. AC Characteristics—I 14
- C Bus Lines (SD, SCK) 14
- 765432 76543210 15
- Read Command Read Data 15
- 16 Rev. 1.3 16
- Rev. 1.3 17 17
- 4. Functional Description 18
- Normalized Output Amplitude 19
- 5.2. Limiting Amplifier 20
- Rev. 1.3 21 21
- 22 Rev. 1.3 22
- 5.5. Receiver Slice Control 23
- 5.7. Reference Clock 24
- Rev. 1.3 25 25
- 26 Rev. 1.3 26
- Rev. 1.3 27 27
- 5.9. Receiver Phase Adjust 28
- 6. Transmitter 29
- 30 Rev. 1.3 30
- Rev. 1.3 31 31
- 32 Rev. 1.3 32
- 7. Loopback Modes 33
- 8. Looptime Mode 33
- 10.1. I 35
- C Interface 35
- 10.2. SPI-Like Interface 36
- 11. Interrupt Functionality 37
- 38 Rev. 1.3 38
- Rev. 1.3 39 39
- 13. Si5040 Register Summary 40
- 44 Rev. 1.3 44
- 46 Rev. 1.3 46
- Rev. 1.3 47 47
- 48 Rev. 1.3 48
- Rev. 1.3 49 49
- 50 Rev. 1.3 50
- 52 Rev. 1.3 52
- Register 10 52
- Rev. 1.3 53 53
- 54 Rev. 1.3 54
- 56 Rev. 1.3 56
- 00 0000 0000 = 0 mV 56
- 11 1111 1111 = 1022 mV 56
- Rev. 1.3 57 57
- Rev. 1.3 59 59
- 60 Rev. 1.3 60
- Note: Default = 10 (decimal) 60
- Note: Default = 15 (decimal) 60
- Rev. 1.3 61 61
- Rev. 1.3 63 63
- Exponent 69
- 70 Rev. 1.3 70
- 72 Rev. 1.3 72
- Rev. 1.3 73 73
- 74 Rev. 1.3 74
- Rev. 1.3 75 75
- 76 Rev. 1.3 76
- Rev. 1.3 77 77
- 78 Rev. 1.3 78
- Rev. 1.3 79 79
- 80 Rev. 1.3 80
- Rev. 1.3 81 81
- 82 Rev. 1.3 82
- Rev. 1.3 83 83
- 84 Rev. 1.3 84
- Rev. 1.3 85 85
- 86 Rev. 1.3 86
- Note: Default = 1 (decimal) 86
- Note: Default = 8 (decimal) 86
- Rev. 1.3 87 87
- Bit D7 D6 D5 D4 D3 D2 D1 D0 87
- Rev. 1.3 89 89
- Rev. 1.3 95 95
- 96 Rev. 1.3 96
- 98 Rev. 1.3 98
- Rev. 1.3 99 99
- 14. Pin Descriptions: Si5040 100
- Rev. 1.3 101 101
- Input/Output 101
- 102 Rev. 1.3 102
- 15. Ordering Guide 103
- 16. Package Outline: Si5040 104
- Rev. 1.3 105 105
- DOCUMENT CHANGE LIST 106
- Revision 0.86 to Revision 1.2 107
- Revision 1.2 to Revision 1.3 107
- CONTACT INFORMATION 108
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