
Si5040
Rev. 1.3 95
Reset settings = 1111 1111
Reset settings = undefined
Register 175. TxtpTargetErr
BitD7D6D5D4D3 D2 D1 D0
Name TxtpTargetErr[7:0]
Type R/W
Bit Name Function
7:0 TxtpTargetErr[7:0] Transmitter Test Pattern Checker Target Error Count.
If the value in the TxtpChkErrCnt register (register 181) exceeds this target error
count, an interrupt will be generated. The value is represented as an 8-bit floating
point number.
Mantissa = bits[7:4]
Exponent = bits[3:0]
Base = 16
0000 0000 = 0 (decimal)
0101 0111 = (5/16) x 16
7
(decimal)
1111 1111 = (15/16) x 16
15
(decimal)
This register value does not represent a target bit error rate (BER). Rather, it is a target bit error
count for the period defined by tpTimeBase[1:0].
Register 176. TxtpChkErrCnt (LSB of a 40-bit Register)
BitD7D6D5D4D3 D2 D1 D0
Name TxtpChkErrCnt[7:0]
Type R
Bit Name Function
7:0 TxtpChkErrCnt[7:0] Transmitter Test Pattern Checker Error Count.
When using a defined timebase, this register holds the error count from the last com-
pleted timebase. In the continuous timebase setting, the register holds the current
running error count. Reading the least significant byte LSB latches the upper bytes.
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