
Si5040
74 Rev. 1.3
Reset settings = 0001 1110
Reset settings = 0000 0000
Register 98. RxLoopFAcq
Bit D7 D6 D5 D4 D3 D2 D1 D0
Name RxLoopFAcqCtl RxLoopFAcq[6:0]
Type R/W R/W
Bit Name Function
7 RxLoopFAcqCtl RX Acquistion Loop Filter Override.
1 = Use value written in Bit [6:0]. Set to 1 only when RX LOL is asserted.
0 = Use internally generated value. Set to 0 when RX LOL is deasserted.
6:0 RxLoopFAcq[6:0] RX Loop Filter Setting for Acquisition.
RX Loop filter override setting to be used during acquisiton. Set to 001 1000b
when RX LOL is asserted and to 000 0000b when RX LOL is deasserted.
Note that any read back may not return the last written value.
Register 106. sqmLOLThreshWrt
Bit D7 D6 D5 D4 D3 D2 D1 D0
Name sqmLOLThreshWrt Reserved sqmLOLThreshAdd[5:0]
Type R/W R/W R/W
Bit Name Function
7 sqmLOLThreshWrt Self-clearning strobe bit to apply sqmLOL Threshold from registers 107,108,109.
This is an indexing address register and requires the sqmLOL threshold address
to be set before writing data in the appropriate indexed data registers. For this
reason, it must first be written to 04h, followed by 84h. Refer to Section 5.8.1 for
more information about this register.
6 Reserved Do not change; must only write 0 to this bit.
5:0 sqmLOL
ThreshAdd[5:0]
Address for sqmLOL Threshold. Must be set to 4.
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