Datacom Systems D56 Especificações Página 101
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Si5040
Rev. 1.3 101
2 RX_LOL DO LVTTL Receiver Loss of Lock (Active High).
This output is asserted when the receiver path is in the loss-
of-lock state. If enabled in the receiver Interrupt Mask register,
this event may cause an interrupt. This pin is reflected as bit 4
in Register 9. The latched version of this pin is in Register 5,
bit 4.
In the absence of an external reference, the lock detect
circuitry uses a data quality measure to determine when
frequency lock has been lost with the incoming data stream.
This pin may also be programmed as a 622 MHz clock output
that is synchronous to the data applied at the transmitter data
(TD) input.
3RX_LOSDOLVTTLReceiver Loss of Signal (Active High).
The RX_LOS output is asserted when a loss-of-signal condi-
tion occurs for Analog LOS, Digital Count LOS, or Signal
Quality Monitor LOS.
22,21 TD+
TD–
AI Differential CML Transmitter Data Input.
High-speed XFI-compliant transmitter data input.
30,29 TXDOUT+
TXDOUT–
AO Differential CML Transmitter Data Output.
Data present at the TD input is retimed and output on the
TXDOUT pins.
Transmit range of operation is 9.8304 Gbps to 11.3 Gbps.
Serial Port
24 SCK DI LVTTL Serial Clock.
Clock input for SPI-like and I
2
C interface.
25 SD DIO LVTTL
or
Open Drain
Serial Data.
Serial bidirectional data interface pin for the SPI-like or I
2
C
serial interface. This pin may be programmed as LVTTL or
open drain (by default) in Register 2. When in LVTTL mode,
the pin is initially in a high-impedance state.
9 SPSEL DI LVTTL
SPI-like or I
2
C Bus Select.
In a logic low state, this input selects I
2
C mode of operation. In
a logic high state, SPI-like mode of operation is selected. This
input has a weak internal pullup.
26 SS
DI LVTTL Chip Select.
Chip select pin for SPI-like interface, active low. This input has
a weak internal pullup. Note that this pin defines the I
2
C when
the serial interface is in I
2
C mode. See "10.1. I2C Interface" on
page 35 for details.
Table 13. Si5040 Pin Descriptions (Continued)
Pin Name Type* Level Description
*Note: TYPE: P = Power; AI = Analog Input; AO = Analog Output; DI = Digital Input; DO = Digital Output; DIO = Digital
Input/Output.
- Features 1
- Applications 1
- Description 1
- Functional Block Diagram 1
- 2 Rev. 1.3 2
- TABLE OF CONTENTS 3
- Measurement 4
- 2. Electrical Specifications 5
- Table 2. DC Characteristics 6
- 8 Rev. 1.3 8
- = 1.8 V +5/–10%, T 8
- = –40 to 95 C) 8
- 10 Rev. 1.3 10
- Table 7. CMU Timing Modes 12
- Rev. 1.3 13 13
- Table 8. AC Characteristics—I 14
- C Bus Lines (SD, SCK) 14
- 765432 76543210 15
- Read Command Read Data 15
- 16 Rev. 1.3 16
- Rev. 1.3 17 17
- 4. Functional Description 18
- Normalized Output Amplitude 19
- 5.2. Limiting Amplifier 20
- Rev. 1.3 21 21
- 22 Rev. 1.3 22
- 5.5. Receiver Slice Control 23
- 5.7. Reference Clock 24
- Rev. 1.3 25 25
- 26 Rev. 1.3 26
- Rev. 1.3 27 27
- 5.9. Receiver Phase Adjust 28
- 6. Transmitter 29
- 30 Rev. 1.3 30
- Rev. 1.3 31 31
- 32 Rev. 1.3 32
- 7. Loopback Modes 33
- 8. Looptime Mode 33
- 10.1. I 35
- C Interface 35
- 10.2. SPI-Like Interface 36
- 11. Interrupt Functionality 37
- 38 Rev. 1.3 38
- Rev. 1.3 39 39
- 13. Si5040 Register Summary 40
- 44 Rev. 1.3 44
- 46 Rev. 1.3 46
- Rev. 1.3 47 47
- 48 Rev. 1.3 48
- Rev. 1.3 49 49
- 50 Rev. 1.3 50
- 52 Rev. 1.3 52
- Register 10 52
- Rev. 1.3 53 53
- 54 Rev. 1.3 54
- 56 Rev. 1.3 56
- 00 0000 0000 = 0 mV 56
- 11 1111 1111 = 1022 mV 56
- Rev. 1.3 57 57
- Rev. 1.3 59 59
- 60 Rev. 1.3 60
- Note: Default = 10 (decimal) 60
- Note: Default = 15 (decimal) 60
- Rev. 1.3 61 61
- Rev. 1.3 63 63
- Exponent 69
- 70 Rev. 1.3 70
- 72 Rev. 1.3 72
- Rev. 1.3 73 73
- 74 Rev. 1.3 74
- Rev. 1.3 75 75
- 76 Rev. 1.3 76
- Rev. 1.3 77 77
- 78 Rev. 1.3 78
- Rev. 1.3 79 79
- 80 Rev. 1.3 80
- Rev. 1.3 81 81
- 82 Rev. 1.3 82
- Rev. 1.3 83 83
- 84 Rev. 1.3 84
- Rev. 1.3 85 85
- 86 Rev. 1.3 86
- Note: Default = 1 (decimal) 86
- Note: Default = 8 (decimal) 86
- Rev. 1.3 87 87
- Bit D7 D6 D5 D4 D3 D2 D1 D0 87
- Rev. 1.3 89 89
- Rev. 1.3 95 95
- 96 Rev. 1.3 96
- 98 Rev. 1.3 98
- Rev. 1.3 99 99
- 14. Pin Descriptions: Si5040 100
- Rev. 1.3 101 101
- Input/Output 101
- 102 Rev. 1.3 102
- 15. Ordering Guide 103
- 16. Package Outline: Si5040 104
- Rev. 1.3 105 105
- DOCUMENT CHANGE LIST 106
- Revision 0.86 to Revision 1.2 107
- Revision 1.2 to Revision 1.3 107
- CONTACT INFORMATION 108
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