Datacom Systems D56 Especificações descarregar pdf (Página 52)

Si5040

52 Rev. 1.3

Reset settings = 0000 0000

BitD7D6D5D4D3D2D1D0

Name

refLOS LOS LOL fifoErr tpErrAlarm tpSyncLos sqmAlarm

Type

RRRRRRRR

Bit Name Function

7 Reserved Read returns zero.

6 refLOS Reference Clock LOS Alarm.

Loss of signal on the reference clock input, based on a coarse deviation in frequency.

5LOSLoss of Signal Alarm.

Loss of signal on the receiver input.

Note: This bit is the logical OR of the Analog LOS (aLOS), Digital LOS (dLOS) and Signal Quality

Monitor LOS (sqmLOS) alarms, which can be enabled individually by programming

4LOLLoss of Lock Alarm.

The receiver PLL has lost lock with the input signal. Reflects the state of the RX_LOL pin

(pin 2).

3fifoErrReceiver FIFO Error Alarm.

The receiver FIFO has overflowed or underflowed. If FIFOAutoReset is active

(Reg28[1] = 1), this bit is automatically cleared when a FIFO over/under flow has

occurred.

2 tpErrAlarm Test Pattern Generator/Checker Alarm.

The receiver test pattern checker has reached the predetermined error count set in Reg-

ister 47.

1 tpSyncLos Test Pattern Checker Loss-of-Sync Alarm.

The receiver test pattern checker has lost sync with the pattern. When the test pattern

checker is disabled, this bit is automatically set to 0. When the test pattern checker is

enabled, an “I” in this location means the test pattern checker has lost synchronization

between the expected pattern and the received pattern.

0sqmAlarmSignal Quality Monitor Alarm.

The internal signal quality monitor value has met the predetermined threshold value.

1 2 ... 47 48 49 50 51 52 53 54 55 56 57 ... 107 108

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Datacom Systems D56 Especificações Página 52